Nanosheet MOSFET with full-height air-gap spacer
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United States of America Patent
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Dec 26, 2017
Issued Date -
N/A
app pub date -
Oct 10, 2016
filing date -
Nov 13, 2015
priority date (Note) -
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Abstract
A semiconductor device includes a gate positioned on a substrate; a nanosheet that extends through the gate, protrudes from a sidewall of the gate, and forms a recess between the substrate and the nanosheet; a dielectric spacer disposed in the recess; a source/drain contact positioned on a source/drain disposed on the substrate adjacent to the gate; an air gap spacer positioned along the sidewall of the gate and in contact with a dielectric material disposed on the nanosheet, the air gap spacer being in contact with the source/drain contact; and an interlayer dielectric (ILD) disposed on the air gap spacer.
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