Coordinating memory operations using memory-device generated reference signals
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United States of America Patent
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Jan 2, 2018
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app pub date -
Jun 6, 2016
filing date -
Feb 23, 2010
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Abstract
A memory system includes a memory controller coupled to multiple memory devices. Each memory device includes an oscillator that generates an internal reference signal that oscillates at a frequency that is a function of physical device structures within the memory device. The frequencies of the internal reference signals are thus device specific. Each memory device develops a shared reference signal from its internal reference signal and communicates the shared reference signal to the common memory controller. The memory controller uses the shared reference signals to recover device-specific frequency information from each memory device, and then communicates with each memory device at a frequency compatible with the corresponding internal reference signal.
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