Hardware timer based mechanism to check interrupt disabled duration

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9858219
SERIAL NO

14495826

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

In one embodiment, a timer apparatus is configured to time a duration in which interrupts are disabled on a processor. The apparatus includes an input to receive a start signal indicating that an interrupt on a processor is disabled, a counter to determine the duration in which interrupts are disabled, and an output to signal a timer event based on the counter. The processor may be configured to trigger a hardware exception in response to the timer event signal. When the interrupts are re-enabled on the processor, the counter of the apparatus may be disabled.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • INTEL CORPORATION

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
U, Satish G Bangalore, IN 1 1

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
7.5 Year Payment $3600.00 $1800.00 $900.00 Jul 2, 2025
11.5 Year Payment $7400.00 $3700.00 $1850.00 Jul 2, 2029
Fee Large entity fee small entity fee micro entity fee
Surcharge - 7.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00