Determining positions of storage elements in a logic design
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United States of America Patent
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Jan 2, 2018
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app pub date -
Sep 23, 2015
filing date -
Sep 23, 2015
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Abstract
A particular method includes performing a timing analysis of a plurality of sub-units of a unit of a logic design. The method also includes identifying a set of grants, where each grant is associated with a first sub-unit having excess time based on the timing analysis. The method further includes identifying a set of requests, where each request is associated with a second sub-unit having a time deficit based on the timing analysis. The method also includes determining a position of a storage element in the logic design based on the set of grants and the set of requests. The method further includes generating an output indicating the position of the storage element.
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