3D multi-layer non-volatile memory device with planar string and method of programming
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United States of America Patent
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Jan 2, 2018
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N/A
app pub date -
May 4, 2015
filing date -
Nov 25, 2014
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Abstract
A semiconductor memory device and a method of operating the same are provided. The semiconductor memory device includes a plurality of memory layers stacked on a semiconductor substrate, wherein each of the plurality of memory layers includes one or more connection control transistors, one or more drain select transistors, a plurality of memory cells, and a source select transistor electrically coupled in series between a plurality of bit lines and a common source line, and the plurality of memory layers share the plurality of bit lines, and the common source lines electrically coupled to each of the plurality of memory layers are electrically disconnected.
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