Semiconductor apparatus reducing a parasitic capacitance

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9859892
SERIAL NO

15047864

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A semiconductor apparatus may include a transmission circuit, a reception circuit, and a pad commonly coupled to the transmission circuit and the reception circuit. When either the transmission circuit or the reception circuit is activated, parasitic capacitance of a line coupled to the transmission circuit, the reception circuit, and the pad is varied.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
SK HYNIX INC2091 GYEONGCHUNG-DAERO BUBAL-EUB ICHEON-SI GYEONGGI-DO

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cho, Sun Ki Icheon-si, KR 25 30

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
7.5 Year Payment $3600.00 $1800.00 $900.00 Jul 2, 2025
11.5 Year Payment $7400.00 $3700.00 $1850.00 Jul 2, 2029
Fee Large entity fee small entity fee micro entity fee
Surcharge - 7.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00