Semiconductor wafer handling and transport
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United States of America Patent
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Jan 9, 2018
Issued Date -
N/A
app pub date -
Oct 26, 2012
filing date -
Oct 26, 2011
priority date (Note) -
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Abstract
A substrate processing system including at least two vertically stacked transport chambers, each of the vertically stacked transport chambers including a plurality of openings arranged to form vertical stacks of openings configured for coupling to vertically stacked process modules, at least one of the vertically stacked transport chambers includes at least one transport chamber module arranged for coupling to another transport chamber module to form a linear transport chamber and another of the at least two stacked transport chambers including at least one transport chamber module arranged for coupling to another transport chamber module to form another linear transport chamber, and a transport robot disposed in each of the transport chamber modules, where a joint of the transport robot is locationally fixed along a linear path formed by the respective linear transport chamber.
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