Nullifying incorrect sampled data contribution in decision feedback equalizer at restart of forwarded clock in memory system

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United States of America Patent

PATENT NO 9865328
SERIAL NO

15367968

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Abstract

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An apparatus includes a detector circuit and a data buffer. The detector circuit may be configured to (i) identify a start of a command sequence associated with a directed access to a memory system and (ii) generate a control signal indicating a non-consecutive clock associated with the start of said command sequence. The data buffer circuit may be configured to initialize a condition of a receiver circuit in response to the control signal prior to reception of a first data bit associated with the command sequence.

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Patent Owner(s)

  • INTEGRATED DEVICE TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
DeSimone, Craig Dacula, US 13 88
Singh, Praveen Alphareatta, US 9 90

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