STT MRAM source line configuration

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United States of America Patent

PATENT NO 9875780
SERIAL NO

15251564

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Abstract

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Improved STT MRAM source line configurations are provided. In one aspect, a STT MRAM array includes: a plurality of cells including magnetic tunnel junctions in series with field effect transistors; a plurality of word lines perpendicular to a plurality of bit lines; a plurality of source line segments spanning m+1 of the bit lines, wherein m of the bit lines include regular array bit lines, and wherein at least one other of the bit lines includes an extra bit line that is connected to the source line segments such that the source line segments span the regular array bit lines and the extra bit line. An STT MRAM device and a method for operating an STT MRAM device are also provided.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
DeBrosse, John K Colchester, US 74 1363

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