Refresh timer synchronization between memory controller and memory

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United States of America Patent

PATENT NO 9875785
SERIAL NO

15246371

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Abstract

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A memory controller is configured to communicate to a DRAM an indication of when a most-recent memory-controller-triggered refresh cycle occurred prior to a transition to a self-refresh mode of operation in which the DRAM self-triggers its refresh cycles.

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Patent Owner(s)

  • QUALCOMM INCORPORATED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Drop, Michael La Mesa, US 14 100
Jose, Edwin San Diego, US 9 54

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