Selectors on interface die for memory device
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United States of America Patent
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Jan 30, 2018
Issued Date -
N/A
app pub date -
Feb 16, 2016
filing date -
Feb 16, 2016
priority date (Note) -
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Abstract
Apparatuses including an interface chip that interfaces with dice through memory channels are described. An example apparatus includes: an interface chip that interfaces with a plurality of dice through a plurality of memory channels, each of the dice comprising a plurality of memory cells, and the interface chip comprising a test circuit. The test circuit includes: first and second terminals corresponding to the first and second memory channels respectively; a test terminal and a built in self test (BIST) circuit common to the first and second memory channels; and a selector coupled to the first and second terminals, the test terminal and the BIST circuit, and couples a first selected one of the first terminal, the test terminal and the BIST circuit to the first channel and a second selected one of the second terminal, the test terminal and the BIST circuit to the second channel.
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