Embedded component package structure and method of manufacturing the same
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United States of America Patent
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Feb 6, 2018
Grant Date -
N/A
app pub date -
Sep 19, 2016
filing date -
Sep 19, 2016
priority date (Note) -
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status (Latency Note)
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Abstract
A package structure includes a carrier defining a cavity in which a die is disposed. A dielectric material fills the cavity around the die. A first conductive layer is disposed over a first surface of the carrier. A first dielectric layer is disposed over an active surface of the die, the first conductive layer and the first surface of the carrier. A first conductive pattern is disposed over the first dielectric layer, and is electrically connected to the first conductive layer and to the active surface of the die. A second dielectric layer is disposed over the second surface of the carrier and defines a hole having a wall aligned with a sidewall of the cavity. A second conductive layer is disposed over the second dielectric layer. A third conductive layer is disposed on the sidewall of the cavity and the wall of the second dielectric layer.
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