Access transistor of a nonvolatile memory device and method for fabricating same
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United States of America Patent
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Feb 13, 2018
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app pub date -
Feb 5, 2015
filing date -
Feb 5, 2015
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Abstract
A three-dimensional integrated circuit nonvolatile memory array includes a memory array of vertical channel NAND flash strings connected between an upper layer connection bit line and a substrate which includes one or more elevated source regions disposed on at least one side of each row of NAND flash strings so that each NAND flash string includes a lower select transistor with a first channel portion that runs perpendicular to the surface of the substrate through a vertical channel string body, a second channel portion that runs parallel to the surface of the substrate, and a third channel portion that runs perpendicular to the surface of the substrate through the elevated source region.
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