DC/DC converter
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United States of America Patent
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Feb 13, 2018
Issued Date -
N/A
app pub date -
Jan 25, 2017
filing date -
Jan 26, 2016
priority date (Note) -
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status (Latency Note)
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Abstract
An error amplifier amplifies a difference between a feedback signal VFB that corresponds to an output voltage VOUT of a DC/DC converter and its target value VREF, so as to generate an error signal VERR. A pulse width modulator for each channel is configured as a peak current mode modulator comprising a PWM comparator that compares a current detection signal VIS with the error signal VERR, and a logic circuit. When the number of enabled channels is switched, a soft shedding circuit selects at least one channel as a correction target channel. The soft shedding circuit generates a correction signal VCORR for each correction target channel, and superimposes each correction signal VCORR on at least one of two inputs of the corresponding PWM comparator.
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