Method and device to reduce leakage and dynamic energy consumption in high-speed memories
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United States of America Patent
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Feb 20, 2018
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app pub date -
Jan 24, 2014
filing date -
Jul 26, 2011
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Abstract
A microcomputer comprising a microprocessor unit and a first memory unit is disclosed. In one aspect, the microprocessor unit comprises at least one functional unit and at least one register. Further, the at least one register is a wide register comprising a plurality of second memory units which are capable to each contain one word, the wide register being adapted so that the second memory units are simultaneously accessible by the first memory unit, and at least part of the second memory units are separately accessible by the at least one functional unit. Further, the first memory unit is an embedded non-volatile memory unit.
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