Two-transistor SRAM semiconductor structure and methods of fabrication
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 20, 2018
Issued Date -
N/A
app pub date -
Feb 7, 2017
filing date -
Sep 25, 2014
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A two-transistor memory cell based upon a thyristor for an SRAM integrated circuit is described together with a process for fabricating it. The memory cell can be implemented in different combinations of MOS and bipolar select transistors, or without select transistors, with thyristors in a semiconductor substrate with shallow trench isolation. Standard CMOS process technology can be used to manufacture the SRAM.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully