Wiring board for device testing
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United States of America Patent
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Feb 27, 2018
Issued Date -
N/A
app pub date -
Nov 1, 2016
filing date -
Nov 3, 2015
priority date (Note) -
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status (Latency Note)
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Abstract
Disclosed is a wiring board for simultaneously testing of multiple semiconductor devices. The wiring board includes a multilayer ceramic substrate, an organic wiring structure arranged on the multilayer ceramic substrate, a plurality of capacitor connection pads formed on the organic wiring structure and a plurality of test pads formed on the organic wiring structure. The organic wiring structure has a plurality of inner conductor layers including first and second plane layers. Each of the first plane layers is divided in a plurality of regions. Each of the second plane layer(s) is placed in a different layer from the first plane layers and made larger in area than the first plane layers. At least a part of the test pads of each test pad group is electrically connected to at least a part of the connection pads via an outermost one of the first plane layers.
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