Methods, systems, and computer program product for implementing DRC clean multi-patterning process nodes with lateral fills in electronic designs
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United States of America Patent
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Feb 27, 2018
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app pub date -
Mar 31, 2015
filing date -
Mar 31, 2015
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Abstract
Disclosed are techniques for implementing DRC clean multi-patterning process nodes with lateral fills. These techniques identify design rules governing multi-patterning and track patterns by accessing a rule deck to retrieve the design rules, identify a first shape and a second shape sandwiching a space and characteristics of the first and second shapes by examining design data of the electronic design, insert one or more lateral fill shapes in the space by implementing the one or more lateral fill shapes along one or more routing tracks of a legal track pattern while automatically complying with the design rules, and perform post-lateral fill or post-layout operations to improve the layout and to prepare the layout for manufacturing.
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