Package structure
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United States of America Patent
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Feb 27, 2018
Issued Date -
N/A
app pub date -
Aug 31, 2017
filing date -
Dec 19, 2014
priority date (Note) -
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status (Latency Note)
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Abstract
A chip packaging structure includes a flexible circuit board, a first built-up structure, a second built-up structure, and a first solder resist layer. The flexible circuit board defines a bent area and a laminated area. The flexible circuit board includes a first dielectric layer. The first dielectric layer includes a first conductive pattern, a bearing layer opposite to the first conductive pattern and corresponding to the laminated area. The first built-up structure is located on the first conductive pattern and corresponds to the laminated area, and includes a second dielectric layer and a second conductive pattern electrically connected with the first conductive pattern. The second built-up structure is located on the bearing layer and corresponds to the laminated area, and includes a third dielectric layer and a third conductive pattern electrically connected with the first conductive pattern. The first solder resist layer covers the second conductive pattern.
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