Cache access statistics accumulation for cache line replacement selection
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United States of America Patent
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Mar 6, 2018
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app pub date -
Sep 22, 2015
filing date -
Sep 22, 2015
priority date (Note) -
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Abstract
A processor device includes a cache and a memory storing a set of counters. Each counter of the set is associated with a corresponding block of a plurality of blocks of the cache. The processor device further includes a cache access monitor to, for each time quantum for a series of one or more time quanta, increment counter values of the set of counters based on accesses to the corresponding blocks of the cache. The processor device further includes a transfer engine to, after completion of each time quantum, transfer the counter values of the set of counters for the time quantum to a corresponding location in a system memory.
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