Transient voltage suppressor (TVS) with reduced breakdown voltage
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United States of America Patent
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Mar 6, 2018
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app pub date -
Feb 28, 2017
filing date -
Dec 22, 2015
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Abstract
A low capacitance transient voltage suppressor with snapback control and a reduced voltage punch-through breakdown mode includes an n+ type substrate, a first epitaxial layer on the substrate, a buried layer formed within the first epitaxial layer, a second epitaxial layer on the first epitaxial layer, and an implant layer formed within the first epitaxial layer below the buried layer. The implant layer extends beyond the buried layer. A set of source regions is formed within a top surface of the second epitaxial layer. Implant regions are formed in the second epitaxial layer, with a first implant region located below the first source region.
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