Storage controller caching using symmetric storage class memory devices

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United States of America Patent

PATENT NO 9916241
SERIAL NO

14826870

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Abstract

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Systems and techniques for performing a data transaction are disclosed that provide data redundancy using two or more cache devices. In some embodiments, a data transaction is received by a storage controller of a storage system from a host system. The storage controller caches data and/or metadata associated with the data transaction to at least two cache devices that are discrete from the storage controller. After caching, the storage controller provides a transaction completion response to the host system from which the transaction was received. In some examples, each of the at least two cache devices includes a storage class memory. In some examples, the storage controller caches metadata to the at least two cache devices and to a controller cache of the storage controller, while data is cached to the at least two cache devices without being cached in the controller cache.

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Patent Owner(s)

Patent OwnerAddress
NETAPP INC495 EAST JAVA DRIVE SUNNYVALE CA 94089

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Friebus, Gregory Wichita, US 3 51
Ganesan, Pradeep Boulder, US 8 76
McKean, Brian Boulder, US 38 1357
Ummadi, Sandeep Kumar R Boulder, US 7 68

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