Using an FPGA for integration with low-latency, non-volatile memory

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United States of America Patent

PATENT NO 9921757
SERIAL NO

15087948

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Abstract

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A plurality of programmable logic blocks are programmed in a first configuration to perform one or both of an access function and a management function with respect to a plurality of non-volatile memory modules. A high data transfer rate connection is provided to an external random access memory device, wherein said at least a subset of said programmable logic blocks are programmed in said first configuration to perform one or both of said access function and said management function at least in part using data sent via a communication interface, wherein the communication interface is coupled to at least a subset of said programmable logic blocks.

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Patent Owner(s)

  • EMC IP HOLDING COMPANY LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Rowett, Kevin Cupertino, US 8 6

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