Memory apparatus, memory system and memory controlling method
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United States of America Patent
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Mar 20, 2018
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N/A
app pub date -
Apr 25, 2016
filing date -
May 12, 2015
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Abstract
A memory apparatus, includes: a memory including memory regions; a table storing a memory address and a number of reading times of data; a first buffer storing first data from another memory apparatus and a first memory address of the first data; a second buffer storing second data to the another memory apparatus and a second memory address of the second data; and a controller configured to store, when a first number of reading times being minimum in the table is smaller than a second number of reading times of the first data, the first data and the first memory address into the first buffer and outputs third data in a memory region of the first number and a third memory address of the third data to the another memory apparatus via the second buffer, and rewrites the third data and memory address with the first data and memory address.
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