Method and apparatus for automatic hierarchical design partitioning

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United States of America Patent

PATENT NO 9922156
SERIAL NO

14448209

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Abstract

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A method for designing a system on a target device is disclosed. The system is synthesized. The system is partitioned into a plurality of logical sections utilizing information derived from synthesizing the system and prior to performing placement of the system on the target device. Other embodiments are described and claimed.

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Patent Owner(s)

  • ALTERA CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Brissenden, Scott James Toronto, CA 11 34
McHardy, Paul Toronto, CA 6 40

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