Semiconductor device and manufacturing method thereof
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United States of America Patent
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Mar 20, 2018
Grant Date -
Nov 3, 2016
app pub date -
Jul 8, 2016
filing date -
Oct 3, 2014
priority date (Note) -
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Abstract
In a silicon carbide semiconductor device having a trench type MOS gate structure, the present invention makes it possible to inhibit the operating characteristic from varying. A p-type channel layer having an impurity concentration distribution homogeneous in the depth direction at the sidewall part of a trench is formed by applying angled ion implantation of p-type impurities to a p−type body layer formed by implanting ions having implantation energies different from each other two or more times after the trench is formed. Further, although the p-type impurities are introduced also into an n−-type drift layer at the bottom part of the trench when the p-type channel layer is formed by the angled ion implantation, a channel length is stipulated by forming an n-type layer having an impurity concentration higher than those of the p-type channel layer, the p−-type body layer, and the n−-type drift layer between the p−-type body layer and the n−-type drift layer. By those measures, it is possible to inhibit the operating characteristic from varying.
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