Switched mode negative inductor
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United States of America Patent
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Mar 20, 2018
Issued Date -
N/A
app pub date -
Apr 13, 2016
filing date -
Apr 14, 2015
priority date (Note) -
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Abstract
A switched mode negative inductance circuit includes an input node responsive to a voltage signal. The circuit also includes first and second voltage sources, first and second controlled switches having first poles coupled to the first and second voltage sources, respectively and an inductor having a first electrode coupled to second poles of the first and second controlled switches and a second electrode coupled to the input node. The input node is coupled to a control electrode of the first controlled switch, and to a control electrode of the second controlled switch through a voltage inverting circuit. The disclosure also illustrates balanced negative inductance circuits and implementation approaches using NMOS transistors.
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