Clock data recovery apparatus and method capable of reducing more noise as well as tracking larger frequency offsets

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United States of America Patent

PATENT NO 9923564
SERIAL NO

15262014

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Abstract

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A clock data recovery apparatus includes an oscillator, a sampler circuit, and a frequency control circuit. The oscillator generates a clock signal according to a bias voltage. The sampler circuit samples an input data signal to generate a sampling signal according to the clock signal. The frequency control circuit generates the bias voltage by performing integration calculation, digital-to-analog conversion, and low-pass filtering for the sampling signal.

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Patent Owner(s)

Patent OwnerAddress
MEDIATEK INCNO 1 DUSING RD 1ST SCIENCE-BASED INDUSTRIAL PARK HSIN-CHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cho, Yi-Hsien Hsinchu County, TW 15 103
Yeh, Tse-Hsien New Taipei, TW 11 30

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