Copper clad laminate for forming of embedded capacitor layer, multilayered printed wiring board, and manufacturing method of multilayered printed wiring board
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United States of America Patent
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Mar 20, 2018
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app pub date -
Feb 20, 2015
filing date -
Feb 21, 2014
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Abstract
A material for forming of the capacitor layer which generates no crack in drilling on the dielectric layer of the capacitor in manufacturing of a highly multilayered printed wiring board embedded a capacitor circuit. Copper clad laminate for forming of an embedded capacitor layer of a multilayered printed wiring board including an embedded capacitor circuit having a layer structure of copper layer/dielectric layer of the capacitor/copper layer in an inner layer characterized in that the composite elastic modulus Er of the resin film constituting the dielectric layer of the capacitor along the thickness direction is less than 6.1 GPa is employed.
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