Temporal change in data-crossing clock phase difference to resolve meta-stability in a clock and data recovery circuit

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United States of America Patent

PATENT NO 9960902
SERIAL NO

15380653

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Abstract

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An example method of clock and data recovery in a receiver includes generating data samples and crossing samples of a received signal based on a data clock signal and a crossing clock signal, respectively, which are derived from a sampling clock signal; adjusting a phase of the sampling clock signal using a clock and data recovery (CDR) circuit based on the data samples and the crossing samples; adjusting relative phase between the data clock signal and the crossing clock signal from a first phase difference to a second phase difference that is less than ninety degrees; and reverting the relative phase between the data clock signal and the crossing clock signal to the first phase difference after a threshold time period.

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Patent Owner(s)

Patent OwnerAddress
XILINX INC2100 LOGIC DRIVE SAN JOSE CA 95124

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Borrelli, Christopher J Los Gatos, US 13 207
Chang, Kun-Yung Los Altos Hills, US 59 751
Frans, Yohan Palo Alto, US 53 532
Leung, Caleb S San Jose, US 4 75
Lin, Winson Daly City, US 16 121
Wong, Alan C San Jose, US 8 86
Xu, Yu Palo Alto, US 139 675

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