Memory device with shortened pre-charging time for bit-line
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United States of America Patent
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May 15, 2018
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N/A
app pub date -
Feb 17, 2016
filing date -
Sep 22, 2015
priority date (Note) -
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Abstract
The present disclosure may provide a memory device including a page buffer and bit-lines coupled thereto with a less load of the bit-lines. In one aspect of the present disclosure, there is provided a memory device comprising: bit-lines, each bit-line having opposite first and second ends; plugs coupled respectively to the bit-lines, each plug disposed between and excluding the first and second ends; and a page buffer coupled to the plugs.
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