Pulse-generator
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United States of America Patent
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May 22, 2018
Issued Date -
N/A
app pub date -
Feb 16, 2016
filing date -
Feb 16, 2016
priority date (Note) -
In Force
status (Latency Note)
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Abstract
The apparatus may include a first latch configured to store a first state or a second state. The first latch may have a first latch input, one of a set input or a reset input, a first pulse clock input, and a first latch output. The first latch input may be coupled to a fixed logic value. The one of the set input or the reset input may be coupled to a clock signal or an inverted clock signal, respectively. The apparatus may include an AND gate having a first AND gate input, a second AND gate input, and a first AND gate output. The clock signal may be coupled to the first AND gate input. The first latch output may be coupled to the second AND gate input. The AND gate output may be configured to output a pulsed clock. The pulsed clock may be coupled to the first pulse clock input.
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