Embedded wire bond wires for vertical integration with separate surface mount and wire bond mounting surfaces
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United States of America Patent
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May 29, 2018
Issued Date -
N/A
app pub date -
Jan 18, 2016
filing date -
Dec 30, 2015
priority date (Note) -
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status (Latency Note)
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Abstract
In a vertically integrated microelectronic package, a first microelectronic device is coupled to an upper surface of a circuit platform in a wire bond-only surface area thereof. Wire bond wires are coupled to and extends away from an upper surface of the first microelectronic device. A second microelectronic device in a face-down orientation is coupled to upper ends of the wire bond wires in a surface mount-only area. The second microelectronic device is located above and at least partially overlaps the first microelectronic device. A protective layer is disposed over the circuit platform and the first microelectronic device. An upper surface of the protective layer has the surface mount-only area. The upper surface of the protective layer has the second microelectronic device disposed thereon in the face-down orientation in the surface mount-only area for coupling to the upper ends of the first wire bond wires.
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