Method of manufacturing semiconductor devices
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jun 5, 2018
Issued Date -
Oct 6, 2016
app pub date -
Mar 25, 2016
filing date -
Mar 31, 2015
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Disclosed is a method of manufacturing semiconductor devices. A dummy gate structure is formed on a pattern area defined by an edge area of a substrate. An interlayer insulating layer pattern is formed to cover the pattern area and exposing the edge area of the substrate. A blocking pattern is formed on the interlayer insulating layer pattern such that the edge area of the substrate is covered with the blocking pattern and the pattern area of the substrate is exposed through the blocking pattern. A gate hole in the pattern area of the substrate in correspondence to the dummy gate structure, and a metal gate structure is formed in the gate hole. Accordingly, the edge area of the substrate is protected in the etching process and the deposition process of the replacement gate metal (RGM) process.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully