Common circuit for GOA test and eliminating power-off residual images
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United States of America Patent
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Jun 12, 2018
Issued Date -
Mar 30, 2017
app pub date -
Jan 27, 2016
filing date -
Sep 25, 2015
priority date (Note) -
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Abstract
The invention discloses a common circuit for GOA test and eliminating power-off residual images, including a first test end (3), a test signal line (AT1) connected to the first test end (3), a second test end (5), a feedback signal line (AT2) connected to the second test end (5), and the same number of test TFTs (T0) as cascade GOA unit circuits. By connecting the gate of each test TFT (T0) to test signal line (AT1), the source to feedback signal line (AT2) and the drain to the output end of corresponding GOA unit circuit and gate scan line, the invention can test the output signal of any stage GOA unit circuit to determine the location of a malfunctioning GOA unit circuit, and releasing the residual charges of the liquid crystal capacitor and storage capacitor at the display area of LCD panel when powering off to eliminate residual images.
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