MEMORY ELEMENT, STACKING, MEMORY MATRIX AND METHOD FOR OPERATING
European Patent Office Patent
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Abstract
The invention relates to a memory element, a stack and a memory matrix in which this memory element can be used, to methods for operating the memory matrix and to methods for determining the truth value of a logic operation in an arrangement of the memory elements. The memory element has at least a first stable state 0 and a second stable state 1. By applying a first writing voltage V 0, this memory element can be converted into the high-resistance state 0 and by applying a second writing voltage V 1 into the likewise high-resistance state 1. When a read-out voltage V R is applied, which is smaller in magnitude than the write voltages V 0 and V 1, the memory element shows different electrical resistance values. The memory element acts as a high-resistance resistor in the parasitic current paths occurring in a memory matrix, without in principle being restricted to unipolar switching. A method has been developed with which an arrangement of the memory elements according to the invention can be made into a gate for arbitrary logical operations.
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