Semiconductor device
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United States of America Patent
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Feb 28, 2012
Grant Date -
Mar 11, 2010
app pub date -
Sep 1, 2009
filing date -
Sep 9, 2008
priority date (Note) -
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Abstract
A semiconductor device is proposed in which signal delay due to compensation capacitance elements in peripheral circuit element regions is eliminated. The semiconductor device includes: a first region including memory cells; a second region 10 including a functional circuit; cell capacitors formed in the first region; and compensation capacitance elements 36 to 38 formed in the second region 10, wherein the compensation capacitance elements 36 to 38 each include a lower electrode 36, a capacitance insulating film 37, and an upper electrode 38, the lower electrode 36, capacitance insulating film 37, and upper electrode 38 being the same as those of the cell capacitors, and wherein the compensation capacitance elements are formed over an upper layer of the second region 10 excluding upper layer portions of drain diffusion layers 44, 46 or gate electrodes 32 of transistors in the functional circuit.
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- RENESAS ELECTRONICS CORPORATION
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Mizushima, Hiroaki | Kanagawa, JP | 37 | 259 |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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