3D NAND memory device and method of forming the same

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United States of America Patent

PATENT NO 11862558
APP PUB NO 20210265268A1
SERIAL NO

17113519

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Abstract

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A semiconductor device is provided. The semiconductor device includes a substrate, a stack of word line layers and insulating layers that are stacked alternatingly over the substrate, and channel structures formed in a first array region and a second array region of the stack. The first array region and the second array region are positioned at opposing sides of the stack. A first staircase is formed in a connection region of the stack over the substrate. The connection region is arranged between the first and second array regions and the first staircase has non-quadrilateral treads. A second staircase is formed in the connection region of the stack over the substrate and the second staircase has non-quadrilateral treads. The connection region in the stack includes a separation region between the first and second staircases.

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Patent Owner(s)

Patent OwnerAddress
YANGTZE MEMORY TECHNOLOGIES CO LTD18 GAOXIN 4TH ROAD EAST LAKE HIGH-TECH DEVELOPMENT ZONE WUHAN 430074

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Su, Rui Wuhan, CN 34 245
Sun, Zhongwang Wuhan, CN 30 33
Xia, Zhiliang Wuhan, CN 213 372
Zhou, Wenxi Wuhan, CN 158 82

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