Memory with variable access granularity

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United States of America Patent

PATENT NO 11803328
SERIAL NO

17428105

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Abstract

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An integrated-circuit memory component receives, as part of respective first and second memory read transactions, a first column access command that identifies a first volume of data and a second column read command that identifies a second volume of data, the second volume of data being constituted by not more than half as many data bits as the first volume of data. In response to receiving the first column access command, the integrated-circuit memory component transmits the first volume of data as N parallel bit-serial data signals over N external signaling links. In response to receiving the second column access command, the integrated-circuit memory component transmits the second volume of data as M parallel bit-serial data signals over M of the N external signaling links, where M is less than N.

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Patent Owner(s)

Patent OwnerAddress
RAMBUS INC4453 NORTH FIRST STREET SUITE 100 SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ware, Frederick A Los Altos Hills, US 757 10947

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