Peak current management in a memory array

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 11495306
APP PUB NO 20210166770A1
SERIAL NO

17176009

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Abstract

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An electronic device comprises a multi-chip package including multiple memory dice that include a memory array, charging circuitry, polling circuitry and a control unit. The charging circuitry is configured to perform one or more memory events in a high current mode using a high current level or in a low current mode using a lower current level. The polling circuitry is configured to poll a power status node common to the multiple memory dice to determine availability of the high current mode. The control unit is configured to operate the charging circuitry in the high current mode to perform the one or more memory events when the polling circuitry indicates that the high current mode is available, and operate the charging circuitry in the low current mode to perform the one or more memory events when the polling circuitry indicates that the high current mode is unavailable.

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Patent Owner(s)

  • MICRON TECHNOLOGY INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Guo, Xiaojiang San Jose, US 73 116
Kavalipurapu, Kalyan Chakravarthy C Hyderabad, IN 5 2
Piccardi, Michele Cupertino, US 78 151

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