Dual stress liner device and method
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United States of America Patent
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Sep 8, 2009
Grant Date -
Feb 28, 2008
app pub date -
Jul 5, 2006
filing date -
Jul 5, 2006
priority date (Note) -
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Abstract
A dual stress liner manufacturing method and device is described. Overlapping stress liner layers of opposite effect (e.g., tensile versus compression) may be deposited over portions of the device, and the uppermost overlapping layer may be polished down in a process that uses the bottom overlapping layer as a stopper. An insulating film may be deposited on the stress liner layers before the polishing, and another insulating film may be deposited above the first insulating film after the polishing. Contacts may be formed such that the contacts need only penetrate one stress liner layer to reach a transistor well or gate structure.
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