Method and system for selecting instructions for re-execution for in-line exception recovery in a speculative execution processor
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United States of America Patent
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Mar 9, 1999
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app pub date -
Jul 25, 1997
filing date -
Jul 25, 1997
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Abstract
A method and related control logic for performing in line recovery from deferred exceptions generated by speculative operations. The control logic includes a re-execution register to mark operands of operations that should be re-executed in a special recovery mode. When the processor detects a deferred exception, it branches to the operation that generated the exception and enters the special in-line recovery mode. The processor executes operations non-speculatively in the recovery mode, and marks the result registers of these operations with re-execution flags. The processor then knows whether to re-execute an operation by checking for re-execution flags associated with the operands of an in-line operation. The processor exits recovery mode when it returns to the point where it detected the deferred exception. The re-execution register enables the processor to recover from deferred exceptions using the program code only, without any additional fix-up code or recovery code.
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Patent Owner(s)
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
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Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Gupta, Rajiv | Los Altos, CA | 134 | 4582 |
Karp, Alan H | Palo Alto, CA | 86 | 2972 |
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