LVDS receiver for controlling current based on frequency and method of operating the LVDS receiver
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United States of America Patent
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Feb 23, 2010
Grant Date -
Jan 5, 2006
app pub date -
Jun 30, 2005
filing date -
Jul 2, 2004
priority date (Note) -
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status (Latency Note)
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Abstract
In an embodiment, an LVDS (Low Voltage Differential Signaling) receiver includes at least one LVDS input buffer, a clock generating unit, and a bias circuit. The clock generating unit includes a voltage controlled oscillator for generating a clock signal tracking a frequency of data received via the at least one LVDS input buffer based on a control voltage. The bias circuit controls current sources that supply current to at least one differential amplifier in the at least one LVDS input buffer based on the control voltage of the clock signal generating unit. Therefore, the LVDS receiver can save current consumed in LVDS input buffers by controlling the amount of current supplied to the at least one differential amplifier included in the at least one LVDS input buffers.
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