Importance

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Abstract

A feedback sample and hold circuit bank (10) of 24 stages (12) is described. The bank (10) is of the type having an operational amplifier common to all the stages (12) and having its output connected to each stage (12) through a sampling switch (S.sub.S) to the input of a buffer (B). A holding capacitor (C.sub.H) is connected between input of the buffer (B) and ground potential. A correction coupling capacitor (C.sub.CC) and a correction holding capacitor (C.sub.CH) are connected respectively in series between the input of the buffer (B) and ground. A correction switch S.sub.C is connected between the amplifier output (14) and the common node (22) of the correction capacitors (C.sub.CC, C.sub.CH). When the sampling switch (S.sub.S) opens for the hold condition, the correction switch (S.sub.C) briefly remains closed to permit the amplifier (A) to correct the hold voltage for switching charge feedthrough error from the sampling switch (S.sub.S) by charging the correction holding capacitor (C.sub.CH). The correction coupling capacitor (C.sub. CC) couples this correction in attenuated form to the holding capacitor (C.sub.H). Also disclosed is a modification (24) including a connection zeroing switch (S.sub.CZ) which periodically zeroes the common node (22) of the correction capacitors (C.sub.CC), (C.sub.CZ) so that large signal amplitudes can be better corrected.

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