Method, control system and plant for processing a semiconductor wafer, and semiconductor wafer

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United States of America Patent

PATENT NO 11158549
APP PUB NO 20200126876A1
SERIAL NO

16624540

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Abstract

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Semiconductor wafers, are processed using minimally three processing operations: a first double-sided polishing operation, a second chemical-mechanical polishing operation and an epitaxial coating operation. A control system for conducting the method defines at least one operating parameter for the processing operations specifically based on at least one wafer parameter measured on the semiconductor wafer after processing in at least one processing operation, based on an actual state of a processing apparatus with which the respective processing operation is conducted, and based on optimizing wafer parameters for flatness after the wafer has undergone all three processing operations instead of optimizing each individual processing step for optimal flatness.

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Patent Owner(s)

  • SILTRONIC AG

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Beyer, Axel Burghausen, DE 8 1
Weber, Christof Burghausen, DE 5 6
Welsch, Stefan Polling, DE 4 1

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