Matrix multiplication unit with flexible precision operations

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United States of America Patent

PATENT NO 11762658
APP PUB NO 20210089304A1
SERIAL NO

16581252

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Abstract

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A processing unit such as a graphics processing unit (GPU) includes a plurality of vector signal processors (VSPs) that include multiply/accumulate elements. The processing unit also includes a plurality of registers associated with the plurality of VSPs. First portions of first and second matrices are fetched into the plurality of registers prior to a first round that includes a plurality of iterations. The multiply/accumulate elements perform matrix multiplication and accumulation on different combinations of subsets of the first portions of the first and second matrices in the plurality of iterations prior to fetching second portions of the first and second matrices into the plurality of registers for a second round. The accumulated results of multiplying the first portions of the first and second matrices are written into an output buffer in response to completing the plurality of iterations.

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Patent Owner(s)

  • ADVANCED MICRO DEVICES INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Jiasheng Orlando, US 34 94
He, Bin Orlando, US 178 1820
Huang, Jian Orlando, US 296 3205
Mantor, Michael Orlando, US 123 1035

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