Implementing check instructions in each thread within a redundant multithreading environments
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United States of America Patent
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Apr 1, 2008
Grant Date -
May 4, 2006
app pub date -
Sep 29, 2004
filing date -
Sep 29, 2004
priority date (Note) -
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Abstract
A method and apparatus for a checker instruction in a redundant multithreading environment is described. In one embodiment, when RMT requires, a processor may issue a checker instruction in both a leading thread and a trailing thread. The checker instruction may travel down individual pipelines for each thread independently until it reaches a buffer at the end of each pipeline. Then, prior to committing the checker instruction, the checker instruction looks for its counterpart and does a comparison of the instructions. If the checker instructions match, the checker instructions commit and retires otherwise an error is declared.
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