Frequency offset correction circuit device

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United States of America Patent

PATENT NO 7542527
APP PUB NO 20060067435A1
SERIAL NO

11219774

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Abstract

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A semiconductor circuit device is provided which can attain more stable operations against noise in a data communication system without increasing the power consumption of an overall system, thereby improving the reliability of data communication. For a demodulation baseband signal (S11) obtained by performing digital processing on an output signal (S6) from an AD converter (6), the maximum value (S12) and the minimum value (S13) are detected as digital values by a maximum value holding circuit (11) and a minimum value holding circuit (12), an averaging circuit (13) obtains an average value (intermediate value) of the maximum value and the minimum value and detects a frequency offset amount (S14), and the frequency offset amount is fed back to a threshold value of data decision (14), so that binarized demodulation data (S15) is outputted in which the offset of the demodulation baseband signal is corrected.

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Patent Owner(s)

  • PANASONIC CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ogawa, Jun Souraku-gun, JP 166 2305
Shiraiwa, Mototugu Yokohama, JP 2 13

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