Reducing design execution run time bit stream size for device testing
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United States of America Patent
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Nov 20, 2007
Grant Date -
N/A
app pub date -
Feb 23, 2005
filing date -
Feb 23, 2005
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method of testing a programmable logic device (PLD) can include distinguishing between stages within the design that uniquely test a routing resource and stages that do not. The method also can include un-routing at least a portion of the design corresponding to one or more of the stages that do not uniquely test a routing resource. The stage(s) can be excluded from the design. The portion of the design that was un-routed can be re-routed by passing those stages that do not uniquely test a routing resource.
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