Integrated circuit dice with edge finishing
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United States of America Patent
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Jun 24, 2014
Grant Date -
N/A
app pub date -
Jan 9, 2012
filing date -
Oct 12, 2009
priority date (Note) -
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status (Latency Note)
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Abstract
In various embodiments, an integrated circuit die is provided. The integrated circuit die may include a circuit on a surface of a semiconductor substrate that has a peripheral sidewall extending substantially perpendicular to and away from the surface. A first protective layer may cover the sidewall of the semiconductor substrate and peripheral edges of the circuit to provide protection from contaminant diffusion. In some embodiments, a semiconductor substrate is provided that has a plurality of dice contained thereon. Each of the dice may have an integrated circuit region and a peripheral sidewall etched into the semiconductor substrate. A first protective layer may be used to cover the peripheral sidewall of the semiconductor substrate to provide protection from contaminant diffusion. Additional apparatuses, systems, and methods are disclosed.
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